This invention relates to a storage element within digital equipment or within data processing systems for implementing shift path maintenance techniques, and more particularly, to an improved bistable device, which can be used singularly as an indicator or in combination forming registers and the like, which is included in the maintenance shift path having essentially no restrictions to interfere with the operation of the shift path maintenance techniques.
A method used to test a large group of digital logic elements within digital equipment or data processing systems uses a technique commonly known as shift path maintenance techniques. (Various manufacturers of computer equipment have utilized these techniques which have been given a variety of names such as Scan Path, Native Fault Test, LSSD (level sensitive scan design), . . . (These shift path maintenance techniques will not be discussed further herein since they are well known in the art.) Generally, there are some implementation restrictions in the shift path maintenance technique test environment which include:
1. all of the bistable devices (i.e., devices that store information) must not be allowed to change state until a specific point in time (i.e., clock time), and
2. all the bistable devices must be clocked simultaneously.
The first restriction implies that asynchronous set and reset inputs to a bistable device are not to be used, and the second restriction implies that multiphase clocks are not allowed. If these restrictions are followed then test patterns can be automatically generated. These two restrictions are well known in the industry. Hence, these restrictions limit the use of scan path maintenance techniques in asynchronous systems since such systems widely use multiphase clock and asynchronous inputs to the bistable devices. These restrictions limit the flexibility of the logic system being designed because these restrictions imply that if the shift path maintenance test method is to be used, there must not be any asynchronous setting or resetting of any of the bistables in the design. Furthermore, the clock that clocks one group of bistable devices must also be used to clock the other bistables in the system (i.e., the system must be a single clock system).
Thus, in order to produce scan path maintenance tests automatically, there is a need to provide an apparatus that would allow the restrictions of a shift path maintenance test environment to coexist with a design which uses multiple clocks and many asynchronous signals to change the state of the bistables in the digital equipment or data processing systems.
The present invention provides a device which eliminates the two hardware design constraints mentioned above. The apparatus of the present invention provides for the coexistence of asynchronous state changes of the bistable devices and multiphase functional clocks along with the implementation of the scan path maintenance techniques.